1. Field of the Invention
The present invention relates to an insulating film material that can be advantageously used for forming an insulating film within a multilayer interconnection structure in a semiconductor integrated circuit, a multilayer interconnection structure having an insulating film that is formed using the insulating film material and that has a low dielectric constant and excels in resistance to damage, a method for manufacturing the multilayer interconnection structure, and a method for manufacturing a semiconductor device.
2. Description of the Related Art
A demand for multilayer semiconductor elements has recently increased following the increase in the degree of integration of semiconductor integrated circuits and the rise of element density. Because spacing between interconnections further decreases as the degree of integration of semiconductor integrated circuits grows, interconnection delay caused by the increase in capacitance between the interconnections becomes a problem. Here, the interconnection delay (T) is represented by the following formula: T∝CR and is, therefore, affected by an interconnection resistance (R) and a capacitance (C) between interconnections. The relationship between a dielectric constant (∈) and the capacitance (C) between interconnections is represented by the following formula C=∈0∈r·S/d, where S is an electrode surface area of an electrode, ∈0 is a dielectric constant of vacuum, ∈r is a dielectric constant of an insulating film, and d is a distance between interconnections. Although the capacitance (C) between interconnections can be decreased by reducing the interconnection thickness and decreasing the electrode surface area, the decrease in interconnection thickness causes additional increase in interconnection resistance (R), thereby making it impossible to attain a high speed. Therefore, decreasing the dielectric constant of the insulating film is an effective means for reducing the interconnection delay (T) and increasing speed.
There is a trend to decrease a spacing between metal interconnections in semiconductor devices having a multilayer interconnection structure. Accordingly, the impedance of metal interconnection determined by electrostatic inductance increases, and the increase in delay of response speed and power consumption causes concerns. Therefore, it is necessary to reduce the specific permittivity of interlayer insulating film provided between a semiconductor substrate and a metal interconnection or between metal interconnections as much as possible.
Inorganic materials such as silicon dioxide (SiO2), silicon nitride (SiN), and phosphosilicate glass (PSG), and organic polymer materials such as polyimides have been used as conventional materials for insulating films.
However, a dielectric constant of CVD-SiO2 films that are widely used in semiconductor devices is as high as about 4. Further, a SiOF film that has been studied as a CVD film with a low dielectric constant has a dielectric constant of about 3.3 to 3.5, but it has high hygroscopicity and the dielectric constant thereof increases with time.
It has recently been suggested to add an organic resin or the like that is evaporated or decomposed on heating to a material for forming a film with a low dielectric constant and to obtain a porous film in which pores are formed by heating during deposition. Because porous films have pores, a dielectric constant lower than that in the conventional configurations can be realized, but the problem that is presently associated with this approach is that the pore size is as large as 10 nm or more and where a porosity (pore presence ratio) is increased with the object of further decreasing the dielectric constant, moisture absorption causes increase in dielectric constant and decrease in film strength.
Further, a material for forming a porous insulating film containing an organopolysiloxane having a specific cage structure (see Japanese Patent Application Laid-Open (JP-A) No. 2004-303777) and a film-forming material containing an organosilicon compound having a cage-like polyhedron structure (see JP-A No. 2000-290287) have also been disclosed.
However, at present, multilayer interconnection structures and semiconductor devices are manufactured by processing the films with a low dielectric constant by etching that employs plasma and liquid reagents, and the problem associated with such technique is that dielectric constant increases due to damage to the film with a low dielectric constant. In the films formed using the materials described in JP-A Nos. 2004-303777 and 2000-290287, because the Si—O—Si bonds are broken during etching, resistance to damage, such as etching resistance and resistance to liquid reagents, deteriorates, the effective permittivity increases after etching, and the response speed of semiconductor device decreases.